Digital audio switcher with AoIP interface_ACM3 Broadcast Control System

Digital audio switcher with AoIP interface

CCSW10X+is an upgraded product of CSW10X, which maintains the core framework and main functions of CSW10X unchanged. The following improvements and enhancements have been made (please refer to the introduction of CSW10X section on the previous page for basic functions)

· Dual AoIP interface for transmission monitoring isolation: Using FPGA as the core for audio switching and routing, it has two independent AoIP module interfaces that can be inserted into different modules to achieve homogeneous or heterogeneous access to different types of AoIP systems. Both AoIP modules have independent and redundant gigabit network ports, and exchange audio signals in the form of TDM circuits through FPGA.

· MCU+FPGA high reliability design: The audio signal inside the device is adapted to the I2S original audio format, and circuit level switching is completed inside the FPGA. Adopting a design that separates the routing control unit from the network communication unit.
· Multiple control methods: Built in high-precision real-time clock (RTC), parameters downloaded locally, monitoring and switching functions are independently completed within the machine. The IP network obtains the running status of devices in parallel. In the event of a network failure, all monitoring, alarm, and switching functions remain offline and can be remotely intervened through the remote control panel. The local panel can be used for emergency operations.
· Digital and analog audio full recovery analysis: Conduct high impedance recovery analysis on the input and output of AES/EBU and analog lines, which can be used for local calculation analysis or sent to remote applications through AoIP network (such as content comparison).

· Complete synchronization design: Customizable options include AoIP synchronization, MADI synchronization, external clock synchronization (2), and internal synchronization. Both AoIP modules can work in master or slave clock mode and achieve clock synchronization docking between the two AoIP systems through FPGA.

performance metrics

AES3 interface: 4 in and 4 out
Analog interface: 1 stereo input+1 stereo output
MADI interface: 1 MADI (multimode/single-mode SC interface)
Network interface: 4 100M/1000M adaptive (2 AoIP modules each)
Synchronization interface: 2 wordclock in (BNC), 1 wordclock out (D-SUB)
Other interfaces: 8GPI+8GPO RS232 RS485
Sampling rate: 48KHz
Quantization depth: 24 bits
Frequency response: ± 0.2dB (20-20KHz)
THD+N: 0.001% (digital) 0.01% (analog)
Dynamic range:>135dB (digital)>110dB (analog)
Isolation:>100dB (1KHz arbitrary input/output)
Phase difference:<0.5 ° (20-20KHz)
Digital jitter: better than 0.003UI
SRC range: 20K-216KHz